by Çetinkaya, Hakan, Girgin, Alper and Karalar, Tufan Coskun
Reference:
Çetinkaya, Hakan, Girgin, Alper and Karalar, Tufan Coskun, "Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm", In Microelectronics Journal, vol. 139, 2023.
Bibtex Entry:
@ARTICLE{Çetinkaya2023,
author = {Çetinkaya, Hakan and Girgin, Alper and Karalar, Tufan Coskun},
title = {Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm},
year = {2023},
journal = {Microelectronics Journal},
volume = {139},
doi = {10.1016/j.mejo.2023.105840},
url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-85169932004&doi=10.1016%2fj.mejo.2023.105840&partnerID=40&md5=8a29810e3a18897b9bb3131c7c023562},
language = {English},
type = {Article},
publication_stage = {Final},
source = {Scopus}
}