by Yilmaz, Yasin, Tozlu, Yavuz Selim and Örs, Berna
Reference:
Yilmaz, Yasin, Tozlu, Yavuz Selim and Örs, Berna, "Design and Implementation of a 32-bit RISC-V Core", 2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021, pp. 460 – 464, 2021.
Bibtex Entry:
@CONFERENCE{Yilmaz2021460,
author = {Yilmaz, Yasin and Tozlu, Yavuz Selim and Örs, Berna},
title = {Design and Implementation of a 32-bit RISC-V Core},
year = {2021},
journal = {2021 13th International Conference on Electrical and Electronics Engineering, ELECO 2021},
pages = {460 – 464},
doi = {10.23919/ELECO54474.2021.9677678},
url = {https://www.scopus.com/inward/record.uri?eid=2-s2.0-85125243793&doi=10.23919%2fELECO54474.2021.9677678&partnerID=40&md5=0b1267ef612b77f2064186b6dcd132d4},
language = {English},
type = {Conference paper},
publication_stage = {Final},
source = {Scopus}
}