by Çetinkaya, H., Girgin, A. and Karalar, T.C.
Reference:
Çetinkaya, H., Girgin, A. and Karalar, T.C., "Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm", In Microelectronics Journal, vol. 139, 2023.
Bibtex Entry:
@ARTICLE{Çetinkaya2023,
author={Çetinkaya, H. and Girgin, A. and Karalar, T.C.},
title={Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm},
journal={Microelectronics Journal},
year={2023},
volume={139},
doi={10.1016/j.mejo.2023.105840},
art_number={105840},
url={https://www.scopus.com/inward/record.uri?eid=2-s2.0-85169932004&doi=10.1016%2fj.mejo.2023.105840&partnerID=40&md5=8a29810e3a18897b9bb3131c7c023562},
language={English},
document_type={Article},
source={Scopus},
}