by Cik, O. and Yalcin, M.E.
Reference:
Cik, O. and Yalcin, M.E., "A Hardware Accelerated Packet Classifier Design for A Network Router [Bir Ag Yonlendiricisi icin Donanimla Hizlandirilmis Bir Paket Siniflayici Tasarimi]", 2020 28th Signal Processing and Communications Applications Conference, SIU 2020 - Proceedings, 2020.
Bibtex Entry:
@CONFERENCE{Cik2020,
author={Cik, O. and Yalcin, M.E.},
title={A Hardware Accelerated Packet Classifier Design for A Network Router [Bir Ag Yonlendiricisi icin Donanimla Hizlandirilmis Bir Paket Siniflayici Tasarimi]},
journal={2020 28th Signal Processing and Communications Applications Conference, SIU 2020 - Proceedings},
year={2020},
doi={10.1109/SIU49456.2020.9302072},
art_number={9302072},
url={https://www.scopus.com/inward/record.uri?eid=2-s2.0-85100303729&doi=10.1109%2fSIU49456.2020.9302072&partnerID=40&md5=8c5845d7a0ac36250300bdbef6593f99},
language={Turkish},
document_type={Conference Paper},
source={Scopus},
}