by Nojehdeh, M.E., Parvin, S. and Altun, M.
Reference:
Nojehdeh, M.E., Parvin, S. and Altun, M., "Efficient Hardware Implementation of Convolution Layers Using Multiply-Accumulate Blocks", Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, pp. 402-405, 2021.
Bibtex Entry:
@CONFERENCE{Nojehdeh2021402,
author={Nojehdeh, M.E. and Parvin, S. and Altun, M.},
title={Efficient Hardware Implementation of Convolution Layers Using Multiply-Accumulate Blocks},
journal={Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI},
year={2021},
volume={2021-July},
pages={402-405},
doi={10.1109/ISVLSI51109.2021.00079},
url={https://www.scopus.com/inward/record.uri?eid=2-s2.0-85114961607&doi=10.1109%2fISVLSI51109.2021.00079&partnerID=40&md5=1646f3781d9a4c8f0f92e5089afa4141},
language={English},
document_type={Conference Paper},
source={Scopus},
}